QEMU源码全解析 —— virtio（17）

已于 2024-10-14 22:31:46 修改
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分类专栏： KVM QEMU/KVM 文章标签： QEMU KVM virtio
于 2023-12-19 20:35:49 首次发布
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本文从QEMU源码的角度，详细阐述virtio驱动的加载过程。内容涉及virtio PCI代理设备如何被虚拟机内部操作系统加载，以及如何通过probe函数与virtio设备通信。分析了virtio_pci_probe函数的步骤，包括virtio_pci_device结构体的分配、设置pci_dev的私有数据以及初始化virtio_device相关结构。
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接前一篇文章：

从 QEMU源码全解析 —— virtio（3） 到上一回 QEMU源码全解析 —— virtio（16） 花了十几个回目讲解了 virtio 设备的初始化，本回开始讲解virtio驱动的加载。

virtio驱动的加载

前文书讲了每一个virtio设备都有一个对应的virtio PCI代理设备，本回开始来分析 虚拟机 内部操作系统是如何加载virtio PCI代理设备和virtio设备驱动、以及如何与virtio设备通信的。由于virtio PCI代理设备的存在，PCI进行扫描的时候会扫描到这个设备，并且会调用相应驱动的probe函数。

virtio_pci_driver及其probe回调函数 在 Linux 内核源码/drivers/virtio/virtio_pci_common.c中，如下所示：

  • virtio_pci_driver 
  1. static struct pci_driver virtio_pci_driver = {
  2. 	.name		= "virtio-pci",
  3. 	.id_table	= virtio_pci_id_table,
  4. 	.probe		= virtio_pci_probe,
  5. 	.remove		= virtio_pci_remove,
  6. #ifdef CONFIG_PM_SLEEP
  7. 	.driver.pm	= &virtio_pci_pm_ops,
  8. #endif
  9. 	.sriov_configure = virtio_pci_sriov_configure,
  10. };
  11.  
  12. module_pci_driver(virtio_pci_driver);
  • virtio_pci_driver的probe函数virtio_pci_probe 
  1. static int virtio_pci_probe(struct pci_dev *pci_dev,
  2. 			    const struct pci_device_id *id)
  3. {
  4. 	struct virtio_pci_device *vp_dev, *reg_dev = NULL;
  5. 	int rc;
  6.  
  7. 	/* allocate our structure and fill it out */
  8. 	vp_dev = kzalloc(sizeof(struct virtio_pci_device), GFP_KERNEL);
  9. 	if (!vp_dev)
  10. 		return -ENOMEM;
  11.  
  12. 	pci_set_drvdata(pci_dev, vp_dev);
  13. 	vp_dev->vdev.dev.parent = &pci_dev->dev;
  14. 	vp_dev->vdev.dev.release = virtio_pci_release_dev;
  15. 	vp_dev->pci_dev = pci_dev;
  16. 	INIT_LIST_HEAD(&vp_dev->virtqueues);
  17. 	spin_lock_init(&vp_dev->lock);
  18.  
  19. 	/* enable the device */
  20. 	rc = pci_enable_device(pci_dev);
  21. 	if (rc)
  22. 		goto err_enable_device;
  23.  
  24. 	if (force_legacy) {
  25. 		rc = virtio_pci_legacy_probe(vp_dev);
  26. 		/* Also try modern mode if we can't map BAR0 (no IO space). */
  27. 		if (rc == -ENODEV || rc == -ENOMEM)
  28. 			rc = virtio_pci_modern_probe(vp_dev);
  29. 		if (rc)
  30. 			goto err_probe;
  31. 	} else {
  32. 		rc = virtio_pci_modern_probe(vp_dev);
  33. 		if (rc == -ENODEV)
  34. 			rc = virtio_pci_legacy_probe(vp_dev);
  35. 		if (rc)
  36. 			goto err_probe;
  37. 	}
  38.  
  39. 	pci_set_master(pci_dev);
  40.  
  41. 	vp_dev->is_legacy = vp_dev->ldev.ioaddr ? true : false;
  42.  
  43. 	rc = register_virtio_device(&vp_dev->vdev);
  44. 	reg_dev = vp_dev;
  45. 	if (rc)
  46. 		goto err_register;
  47.  
  48. 	return 0;
  49.  
  50. err_register:
  51. 	if (vp_dev->is_legacy)
  52. 		virtio_pci_legacy_remove(vp_dev);
  53. 	else
  54. 		virtio_pci_modern_remove(vp_dev);
  55. err_probe:
  56. 	pci_disable_device(pci_dev);
  57. err_enable_device:
  58. 	if (reg_dev)
  59. 		put_device(&vp_dev->vdev.dev);
  60. 	else
  61. 		kfree(vp_dev);
  62. 	return rc;
  63. }

（1）virtio_pci_probe函数分配一个virtio_pci_device结构体实例并赋值给vp_dev，用来表示一个virtio PCI代理设备。代码片段如下： 

  1.     struct virtio_pci_device *vp_dev, *reg_dev = NULL;
  2.     ……
  3.     /* allocate our structure and fill it out */
  4. 	vp_dev = kzalloc(sizeof(struct virtio_pci_device), GFP_KERNEL);
  5. 	if (!vp_dev)
  6. 		return -ENOMEM;

struct virtio_pci_device的定义在Linux内核源码/drivers/virtio/virtio_pci_common.h中，代码如下： 

  1. /* Our device structure */
  2. struct virtio_pci_device {
  3. 	struct virtio_device vdev;
  4. 	struct pci_dev *pci_dev;
  5. 	struct virtio_pci_legacy_device ldev;
  6. 	struct virtio_pci_modern_device mdev;
  7.  
  8. 	bool is_legacy;
  9.  
  10. 	/* Where to read and clear interrupt */
  11. 	u8 __iomem *isr;
  12.  
  13. 	/* a list of queues so we can dispatch IRQs */
  14. 	spinlock_t lock;
  15. 	struct list_head virtqueues;
  16.  
  17. 	/* array of all queues for house-keeping */
  18. 	struct virtio_pci_vq_info **vqs;
  19.  
  20. 	/* MSI-X support */
  21. 	int msix_enabled;
  22. 	int intx_enabled;
  23. 	cpumask_var_t *msix_affinity_masks;
  24. 	/* Name strings for interrupts. This size should be enough,
  25. 	 * and I'm too lazy to allocate each name separately. */
  26. 	char (*msix_names)[256];
  27. 	/* Number of available vectors */
  28. 	unsigned int msix_vectors;
  29. 	/* Vectors allocated, excluding per-vq vectors if any */
  30. 	unsigned int msix_used_vectors;
  31.  
  32. 	/* Whether we have vector per vq */
  33. 	bool per_vq_vectors;
  34.  
  35. 	struct virtqueue *(*setup_vq)(struct virtio_pci_device *vp_dev,
  36. 				      struct virtio_pci_vq_info *info,
  37. 				      unsigned int idx,
  38. 				      void (*callback)(struct virtqueue *vq),
  39. 				      const char *name,
  40. 				      bool ctx,
  41. 				      u16 msix_vec);
  42. 	void (*del_vq)(struct virtio_pci_vq_info *info);
  43.  
  44. 	u16 (*config_vector)(struct virtio_pci_device *vp_dev, u16 vector);
  45. };

（2）将vp_dev设置为该pci_dev的私有结构。代码片段如下： 

    pci_set_drvdata(pci_dev, vp_dev);

pci_set_drvdata函数在Linux内核源码/include/linux/pci.h中，代码如下： 

  1. static inline void pci_set_drvdata(struct pci_dev *pdev, void *data)
  2. {
  3. 	dev_set_drvdata(&pdev->dev, data);
  4. }

dev_set_drvdata函数在Linux内核源码/include\linux\device.h中，代码如下： 

  1. static inline void dev_set_drvdata(struct device *dev, void *data)
  2. {
  3. 	dev->driver_data = data;
  4. }

综上， 

    pci_set_drvdata(pci_dev, vp_dev);

展开后实际上是： 

    (&pci_dev->dev)->driver_data = vp_dev;

struct pci_dev的定义在Linux内核源码/include/linux/pci.h中，如下： 

  1. /* The pci_dev structure describes PCI devices */
  2. struct pci_dev {
  3. 	struct list_head bus_list;	/* Node in per-bus list */
  4. 	struct pci_bus	*bus;		/* Bus this device is on */
  5. 	struct pci_bus	*subordinate;	/* Bus this device bridges to */
  6.  
  7. 	void		*sysdata;	/* Hook for sys-specific extension */
  8. 	struct proc_dir_entry *procent;	/* Device entry in /proc/bus/pci */
  9. 	struct pci_slot	*slot;		/* Physical slot this device is in */
  10.  
  11. 	unsigned int	devfn;		/* Encoded device & function index */
  12. 	unsigned short	vendor;
  13. 	unsigned short	device;
  14. 	unsigned short	subsystem_vendor;
  15. 	unsigned short	subsystem_device;
  16. 	unsigned int	class;		/* 3 bytes: (base,sub,prog-if) */
  17. 	u8		revision;	/* PCI revision, low byte of class word */
  18. 	u8		hdr_type;	/* PCI header type (`multi' flag masked out) */
  19. #ifdef CONFIG_PCIEAER
  20. 	u16		aer_cap;	/* AER capability offset */
  21. 	struct aer_stats *aer_stats;	/* AER stats for this device */
  22. #endif
  23. #ifdef CONFIG_PCIEPORTBUS
  24. 	struct rcec_ea	*rcec_ea;	/* RCEC cached endpoint association */
  25. 	struct pci_dev  *rcec;          /* Associated RCEC device */
  26. #endif
  27. 	u32		devcap;		/* PCIe Device Capabilities */
  28. 	u8		pcie_cap;	/* PCIe capability offset */
  29. 	u8		msi_cap;	/* MSI capability offset */
  30. 	u8		msix_cap;	/* MSI-X capability offset */
  31. 	u8		pcie_mpss:3;	/* PCIe Max Payload Size Supported */
  32. 	u8		rom_base_reg;	/* Config register controlling ROM */
  33. 	u8		pin;		/* Interrupt pin this device uses */
  34. 	u16		pcie_flags_reg;	/* Cached PCIe Capabilities Register */
  35. 	unsigned long	*dma_alias_mask;/* Mask of enabled devfn aliases */
  36.  
  37. 	struct pci_driver *driver;	/* Driver bound to this device */
  38. 	u64		dma_mask;	/* Mask of the bits of bus address this
  39. 					   device implements.  Normally this is
  40. 					   0xffffffff.  You only need to change
  41. 					   this if your device has broken DMA
  42. 					   or supports 64-bit transfers.  */
  43.  
  44. 	struct device_dma_parameters dma_parms;
  45.  
  46. 	pci_power_t	current_state;	/* Current operating state. In ACPI,
  47. 					   this is D0-D3, D0 being fully
  48. 					   functional, and D3 being off. */
  49. 	unsigned int	imm_ready:1;	/* Supports Immediate Readiness */
  50. 	u8		pm_cap;		/* PM capability offset */
  51. 	unsigned int	pme_support:5;	/* Bitmask of states from which PME#
  52. 					   can be generated */
  53. 	unsigned int	pme_poll:1;	/* Poll device's PME status bit */
  54. 	unsigned int	d1_support:1;	/* Low power state D1 is supported */
  55. 	unsigned int	d2_support:1;	/* Low power state D2 is supported */
  56. 	unsigned int	no_d1d2:1;	/* D1 and D2 are forbidden */
  57. 	unsigned int	no_d3cold:1;	/* D3cold is forbidden */
  58. 	unsigned int	bridge_d3:1;	/* Allow D3 for bridge */
  59. 	unsigned int	d3cold_allowed:1;	/* D3cold is allowed by user */
  60. 	unsigned int	mmio_always_on:1;	/* Disallow turning off io/mem
  61. 						   decoding during BAR sizing */
  62. 	unsigned int	wakeup_prepared:1;
  63. 	unsigned int	skip_bus_pm:1;	/* Internal: Skip bus-level PM */
  64. 	unsigned int	ignore_hotplug:1;	/* Ignore hotplug events */
  65. 	unsigned int	hotplug_user_indicators:1; /* SlotCtl indicators
  66. 						      controlled exclusively by
  67. 						      user sysfs */
  68. 	unsigned int	clear_retrain_link:1;	/* Need to clear Retrain Link
  69. 						   bit manually */
  70. 	unsigned int	d3hot_delay;	/* D3hot->D0 transition time in ms */
  71. 	unsigned int	d3cold_delay;	/* D3cold->D0 transition time in ms */
  72.  
  73. #ifdef CONFIG_PCIEASPM
  74. 	struct pcie_link_state	*link_state;	/* ASPM link state */
  75. 	unsigned int	ltr_path:1;	/* Latency Tolerance Reporting
  76. 					   supported from root to here */
  77. 	u16		l1ss;		/* L1SS Capability pointer */
  78. #endif
  79. 	unsigned int	pasid_no_tlp:1;		/* PASID works without TLP Prefix */
  80. 	unsigned int	eetlp_prefix_path:1;	/* End-to-End TLP Prefix */
  81.  
  82. 	pci_channel_state_t error_state;	/* Current connectivity state */
  83. 	struct device	dev;			/* Generic device interface */
  84.  
  85. 	int		cfg_size;		/* Size of config space */
  86.  
  87. 	/*
  88. 	 * Instead of touching interrupt line and base address registers
  89. 	 * directly, use the values stored here. They might be different!
  90. 	 */
  91. 	unsigned int	irq;
  92. 	struct resource resource[DEVICE_COUNT_RESOURCE]; /* I/O and memory regions + expansion ROMs */
  93.  
  94. 	bool		match_driver;		/* Skip attaching driver */
  95.  
  96. 	unsigned int	transparent:1;		/* Subtractive decode bridge */
  97. 	unsigned int	io_window:1;		/* Bridge has I/O window */
  98. 	unsigned int	pref_window:1;		/* Bridge has pref mem window */
  99. 	unsigned int	pref_64_window:1;	/* Pref mem window is 64-bit */
  100. 	unsigned int	multifunction:1;	/* Multi-function device */
  101.  
  102. 	unsigned int	is_busmaster:1;		/* Is busmaster */
  103. 	unsigned int	no_msi:1;		/* May not use MSI */
  104. 	unsigned int	no_64bit_msi:1;		/* May only use 32-bit MSIs */
  105. 	unsigned int	block_cfg_access:1;	/* Config space access blocked */
  106. 	unsigned int	broken_parity_status:1;	/* Generates false positive parity */
  107. 	unsigned int	irq_reroute_variant:2;	/* Needs IRQ rerouting variant */
  108. 	unsigned int	msi_enabled:1;
  109. 	unsigned int	msix_enabled:1;
  110. 	unsigned int	ari_enabled:1;		/* ARI forwarding */
  111. 	unsigned int	ats_enabled:1;		/* Address Translation Svc */
  112. 	unsigned int	pasid_enabled:1;	/* Process Address Space ID */
  113. 	unsigned int	pri_enabled:1;		/* Page Request Interface */
  114. 	unsigned int	is_managed:1;		/* Managed via devres */
  115. 	unsigned int	is_msi_managed:1;	/* MSI release via devres installed */
  116. 	unsigned int	needs_freset:1;		/* Requires fundamental reset */
  117. 	unsigned int	state_saved:1;
  118. 	unsigned int	is_physfn:1;
  119. 	unsigned int	is_virtfn:1;
  120. 	unsigned int	is_hotplug_bridge:1;
  121. 	unsigned int	shpc_managed:1;		/* SHPC owned by shpchp */
  122. 	unsigned int	is_thunderbolt:1;	/* Thunderbolt controller */
  123. 	/*
  124. 	 * Devices marked being untrusted are the ones that can potentially
  125. 	 * execute DMA attacks and similar. They are typically connected
  126. 	 * through external ports such as Thunderbolt but not limited to
  127. 	 * that. When an IOMMU is enabled they should be getting full
  128. 	 * mappings to make sure they cannot access arbitrary memory.
  129. 	 */
  130. 	unsigned int	untrusted:1;
  131. 	/*
  132. 	 * Info from the platform, e.g., ACPI or device tree, may mark a
  133. 	 * device as "external-facing".  An external-facing device is
  134. 	 * itself internal but devices downstream from it are external.
  135. 	 */
  136. 	unsigned int	external_facing:1;
  137. 	unsigned int	broken_intx_masking:1;	/* INTx masking can't be used */
  138. 	unsigned int	io_window_1k:1;		/* Intel bridge 1K I/O windows */
  139. 	unsigned int	irq_managed:1;
  140. 	unsigned int	non_compliant_bars:1;	/* Broken BARs; ignore them */
  141. 	unsigned int	is_probed:1;		/* Device probing in progress */
  142. 	unsigned int	link_active_reporting:1;/* Device capable of reporting link active */
  143. 	unsigned int	no_vf_scan:1;		/* Don't scan for VFs after IOV enablement */
  144. 	unsigned int	no_command_memory:1;	/* No PCI_COMMAND_MEMORY */
  145. 	unsigned int	rom_bar_overlap:1;	/* ROM BAR disable broken */
  146. 	pci_dev_flags_t dev_flags;
  147. 	atomic_t	enable_cnt;	/* pci_enable_device has been called */
  148.  
  149. 	u32		saved_config_space[16]; /* Config space saved at suspend time */
  150. 	struct hlist_head saved_cap_space;
  151. 	int		rom_attr_enabled;	/* Display of ROM attribute enabled? */
  152. 	struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for resources */
  153. 	struct bin_attribute *res_attr_wc[DEVICE_COUNT_RESOURCE]; /* sysfs file for WC mapping of resources */
  154.  
  155. #ifdef CONFIG_HOTPLUG_PCI_PCIE
  156. 	unsigned int	broken_cmd_compl:1;	/* No compl for some cmds */
  157. #endif
  158. #ifdef CONFIG_PCIE_PTM
  159. 	u16		ptm_cap;		/* PTM Capability */
  160. 	unsigned int	ptm_root:1;
  161. 	unsigned int	ptm_enabled:1;
  162. 	u8		ptm_granularity;
  163. #endif
  164. #ifdef CONFIG_PCI_MSI
  165. 	void __iomem	*msix_base;
  166. 	raw_spinlock_t	msi_lock;
  167. #endif
  168. 	struct pci_vpd	vpd;
  169. #ifdef CONFIG_PCIE_DPC
  170. 	u16		dpc_cap;
  171. 	unsigned int	dpc_rp_extensions:1;
  172. 	u8		dpc_rp_log_size;
  173. #endif
  174. #ifdef CONFIG_PCI_ATS
  175. 	union {
  176. 		struct pci_sriov	*sriov;		/* PF: SR-IOV info */
  177. 		struct pci_dev		*physfn;	/* VF: related PF */
  178. 	};
  179. 	u16		ats_cap;	/* ATS Capability offset */
  180. 	u8		ats_stu;	/* ATS Smallest Translation Unit */
  181. #endif
  182. #ifdef CONFIG_PCI_PRI
  183. 	u16		pri_cap;	/* PRI Capability offset */
  184. 	u32		pri_reqs_alloc; /* Number of PRI requests allocated */
  185. 	unsigned int	pasid_required:1; /* PRG Response PASID Required */
  186. #endif
  187. #ifdef CONFIG_PCI_PASID
  188. 	u16		pasid_cap;	/* PASID Capability offset */
  189. 	u16		pasid_features;
  190. #endif
  191. #ifdef CONFIG_PCI_P2PDMA
  192. 	struct pci_p2pdma __rcu *p2pdma;
  193. #endif
  194. 	u16		acs_cap;	/* ACS Capability offset */
  195. 	phys_addr_t	rom;		/* Physical address if not from BAR */
  196. 	size_t		romlen;		/* Length if not from BAR */
  197. 	/*
  198. 	 * Driver name to force a match.  Do not set directly, because core
  199. 	 * frees it.  Use driver_set_override() to set or clear it.
  200. 	 */
  201. 	const char	*driver_override;
  202.  
  203. 	unsigned long	priv_flags;	/* Private flags for the PCI driver */
  204.  
  205. 	/* These methods index pci_reset_fn_methods[] */
  206. 	u8 reset_methods[PCI_NUM_RESET_METHODS]; /* In priority order */
  207. };

（3） 初始化 vp_dev即virtio_pci_device结构中virtio_device类型的vdev成员相关结构。代码片段如下： 

  1.     vp_dev->vdev.dev.parent = &pci_dev->dev;
  2. 	vp_dev->vdev.dev.release = virtio_pci_release_dev;
  3. 	vp_dev->pci_dev = pci_dev;
  4. 	INIT_LIST_HEAD(&vp_dev->virtqueues);
  5. 	spin_lock_init(&vp_dev->lock);

virtio_pci_probe函数其余部分代码的解析，请看下回。

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